Lesson 1
Computer Systems Lesson 1
Computer Systems Lesson 1 of 5

What does a computer
actually do?

Before we name a single component, we need to answer one question: what is a computer's job? The answer shapes everything else in this series.

35-45 minutes Core content Core GCSE CS content FDE Visualiser included
Opening question

Your phone is three years old. It still runs the same apps. It still connects to the same network. But something feels different - pages take a fraction longer to load, the camera is slower to process, the battery drains by lunchtime. Why?

Think about it: Is it the software? The battery? The processor? All three? By the end of this series, you will know exactly which component is responsible for each symptom - and why.
The answer starts long before we talk about specs and clock speeds. It starts with understanding what a computer is actually doing every single moment it is switched on.
Every computer - from a smartwatch to a supercomputer - does exactly one thing. It takes in data, does something with it, and produces a result. That is it. Everything else is detail layered on top.
The model

Input, Process, Output

The simplest way to describe what any computer does is the IPO model. Every task a computer carries out, no matter how complex, fits into these three stages.
⌨️
Input
Data enters the system from the outside world - a key press, a mouse click, a sensor reading, a network packet.
→
⚙️
Process
The CPU follows instructions to manipulate that data - adding numbers, comparing values, moving data between locations.
→
🖥️
Output
The result is sent somewhere useful - a screen, a speaker, a network connection, a file saved to storage.
Notice that storage does not appear in the classic IPO diagram - but it supports all three stages. Data can be stored before input, during processing (in memory), or after output (saved to disk). We will come back to this when we look at memory and storage.
Activity: Classify these examples
Drag each item into the correct category. Some may surprise you.
Pressing a key
Pixel displayed on screen
Adding two numbers
Microphone audio signal
Speaker playing sound
Comparing a password hash
GPS satellite signal
Printing a document
Sorting a list alphabetically
Input
Process
Output
The cycle

The Fetch-Decode-Execute cycle

The processing stage is where things get interesting. The CPU does not just receive data and magically produce a result. It works through a repeating cycle - thousands of millions of times per second - called the Fetch-Decode-Execute cycle.
Each time around the cycle, the CPU handles exactly one instruction. Here is what happens at each stage:
Fetch
Decode
Execute
Program Counter (PC)
0x0014
Memory Address Register (MAR)
0x0014
→
address bus
Main Memory (RAM)
ADD R1, R2
Memory Data Register (MDR)
ADD R1, R2
Fetch: The Program Counter holds the memory address of the next instruction. That address is copied to the MAR and sent along the address bus to RAM. The instruction stored at that address is copied back to the MDR, ready for decoding. The PC then increments to point to the next instruction.
Memory Data Register (MDR)
ADD R1, R2
Current Instruction Register (CIR)
ADD R1, R2
→
decode
Control Unit
"Add two registers"
Decode: The instruction is copied from the MDR to the Current Instruction Register (CIR). The Control Unit then breaks the instruction apart - separating the opcode (what to do) from the operands (what to do it to). Here it recognises ADD as an arithmetic operation requiring the ALU.
Control Unit
signals ALU
→
control signals
ALU
R1 + R2 = result
Accumulator (ACC)
result stored here
Execute: The Control Unit sends signals to the correct part of the CPU. For an ADD instruction, the ALU performs the calculation and stores the result in the Accumulator. Then the whole cycle begins again with the PC pointing to the next instruction.
FDE Visualiser - see it live
Watch data move between registers and along buses in real time. Step through each stage of the cycle at your own pace, or run it automatically. The best way to make the cycle click.
Open FDE Visualiser
Exam focus

Questions often ask you to describe what happens during one specific stage of the FDE cycle. Use register names (PC, MAR, MDR, CIR) and bus names (address bus, data bus, control bus) in your answers. Simply saying "the CPU fetches the instruction" will not score marks - the examiner wants to see which registers are involved and in what order.

The architecture

The Von Neumann architecture

The FDE cycle describes what the CPU does. The Von Neumann architecture describes the physical arrangement of components that makes it possible. Proposed by mathematician John Von Neumann in 1945, the design is still the foundation of almost every general-purpose computer built today.
The key insight was radical for its time: store programs in memory in the same place as data. Before this, programs were wired into machines physically. Von Neumann's model meant you could change what a computer did simply by loading different instructions - no rewiring required.
Von Neumann Architecture - Simplified
Input Devices
keyboard, mouse, mic
data
CPU
CU - ALU - Registers - Cache
data
Output Devices
screen, speakers, printer
address + data buses
Main Memory (RAM)
stores both programs and data
Von Neumann bottleneck
The CPU is often faster than it can receive data from RAM. The bus connecting them limits performance - a fundamental constraint of the design.
Stored program concept
Instructions and data are stored together in the same memory, allowing programs to be easily loaded, changed and executed without hardware modifications.
Program Counter (PC)
A register that holds the memory address of the next instruction to be fetched. It increments automatically after each fetch.
Buses
Electrical pathways connecting components. The address bus carries memory locations, the data bus carries values, the control bus carries signals.
Check your understanding

Quick quiz

Lesson 1 Quiz
5 questions - click an option to answer
Question 1 of 5
Which of these correctly describes the Von Neumann stored program concept?
Question 2 of 5
During the FETCH stage, which register is used to hold the address of the next instruction?
Question 3 of 5
A printer receiving a document to print is an example of which part of the IPO model?
Question 4 of 5
During DECODE, which component is responsible for interpreting the instruction?
Question 5 of 5
What is the Von Neumann bottleneck?
out of 5 correct
Think deeper

Discussion questions

Discussion

1. Modern smartphones use a system-on-a-chip (SoC) design where the CPU, GPU, and RAM are all on a single chip. How might this address the Von Neumann bottleneck?

By placing the CPU and RAM on the same chip (or very close together with high-bandwidth connections), data can travel much shorter distances at much higher speeds. This reduces the time the CPU spends waiting for data - the core problem with the Von Neumann bottleneck. Apple's M-series chips use this approach, with CPU and RAM sharing a unified memory architecture on the same die.
Discussion

2. The FDE cycle runs billions of times per second. What does this mean for how we should think about the "size" of a program?

Even a "simple" program - like displaying a window on screen - involves millions of individual FDE cycles. The CPU has no concept of "big" or "small" operations: it just runs cycles. A complex AI model and a simple addition are both just sequences of fetch-decode-execute iterations. This helps explain why processor speed and efficiency matter so much - even a tiny improvement per cycle multiplies across billions of instructions.
Printable Worksheets

Practice what you've learned

Three worksheets covering the FDE cycle at three levels: Recall, Apply, and Exam-style.

Recall
Worksheet 1
Key terms matching + FDE cycle table + True/False • 18 marks
Apply
Worksheet 2
Application questions + stored program justification • 17 marks
Exam-style
Worksheet 3
Exam-style practice paper with extended response questions • 20 marks
Revision
Computer Systems Flashcards
27 key terms across all 5 lessons. Filter by topic, flip to reveal, mark as known.
Open flashcards
Lesson 2: Inside the CPU
Lesson 1 - Teacher Resources
What does a computer actually do?
Teacher mode (all pages)
Shows examiner notes on the Exam Practice page
Suggested starter (5 min)
Write on the board: "Name 5 things your laptop is doing right now while you sit here doing nothing." Give 90 seconds. Students call out: checking email, syncing files, running antivirus. Now ask: "Can you reduce every single one of those to three words?" Wait. Eventually lead them to: fetch, decode, execute. You have just taught the entire lesson before it started.
Lesson objectives
1Describe the stored program concept: why storing both instructions and data in memory was the key breakthrough that made general-purpose computers possible.
2Explain each stage of the FDE cycle - what is fetched, where it goes, what decoding means, and what execution produces.
3Trace the flow of data between the CPU and main memory during a single FDE cycle, naming the registers involved (PC, MAR, MDR, CIR).
4Give two concrete real-world examples of the FDE cycle operating at different timescales (e.g. a single keystroke vs rendering a video frame).
Key vocabulary (board-ready)
Von Neumann architecture
The design principle - proposed in 1945 - that both program instructions and data are stored together in main memory, fetched sequentially by the CPU.
FDE cycle
The three-stage loop every CPU repeats billions of times per second: Fetch an instruction from memory, Decode what it means, Execute it.
Program Counter (PC)
A register that holds the memory address of the next instruction to be fetched. It increments automatically after each fetch.
Memory Address Register (MAR)
Holds the address in memory that the CPU wants to read from or write to during the current cycle.
Memory Data Register (MDR)
A buffer register that holds data just fetched from memory, or data about to be written to memory.
Current Instruction Register (CIR)
Holds the instruction currently being decoded and executed.
Stored program
The concept that a program's instructions are stored as data in memory and can be modified or replaced - making general-purpose computers possible.
Suggested lesson plan
0-5 min: Starter activity above. Collect answers. Bridge: every task reduces to fetch, decode, execute.
5-15 min: Von Neumann architecture: stored program concept, brief history. Contrast with fixed-function machines. Students annotate a CPU diagram.
15-30 min: FDE cycle in detail: Fetch (PC to MAR, memory to MDR, MDR to CIR), Decode (CU analyses CIR), Execute (ALU/memory/output). Use the interactive FDE Visualiser.
30-40 min: Students manually trace a 4-instruction program through the FDE cycle, writing register values at each step. Pair and check.
40-50 min: Real-world examples: one keystroke, one frame of video, one web request. How many FDE cycles per action?
50-60 min: Exit tickets on mini-whiteboards. Address the most common mistake as a class.
Discussion prompts
Before stored programs, each machine was built for one task. A calculator only calculated. What changed when programs became data stored in memory? What became possible that was impossible before?
A modern CPU executes roughly 3 billion FDE cycles per second. A human heartbeat takes about 800 milliseconds. How many FDE cycles happen in one heartbeat? Does this change how you think about the word "fast"?
When you press Ctrl+S to save a file, describe step by step at the FDE level what the computer is doing. Where does the instruction come from? Where does the data go?
The Von Neumann bottleneck is a real problem: the CPU is so much faster than memory that it spends time waiting. How have engineers tried to solve this? (Lead into cache in Lesson 3.)
Common misconceptions
X"The CPU does all the work" - the CPU orchestrates, but relies on memory, buses, and I/O devices. Without MDR and MAR, the CPU cannot communicate with RAM at all.
X"Decode means translate the instruction into English" - decode means the Control Unit identifies the type of operation (arithmetic, load, store, branch) and activates the appropriate circuits.
X"Execute always means doing a calculation" - execute covers arithmetic (ALU), memory read/write, control flow (jumps/branches), and I/O. Most cycles are not arithmetic operations.
X"The program counter always increases by 1" - it increases by the size of one instruction, and is overwritten completely by jump and branch instructions.
Exit ticket questions
What does the Program Counter contain at any point during the FDE cycle?
[1 mark - address of the next instruction to fetch]
State the two registers involved in transferring data between the CPU and main memory.
[2 marks - MAR and MDR]
Explain why the stored program concept was important in computing history.
[2 marks - programs stored as data in memory / machine can be reprogrammed without rewiring / general-purpose computing becomes possible]
A CPU executes instructions at addresses 200, 201, 202, then jumps to 150. What is in the PC after the jump?
[1 mark - 150 / 151 (accept next instruction address)]
Homework idea
Research the difference between Von Neumann and Harvard architecture. Write three sentences: (1) what is structurally different, (2) what practical advantage the Harvard design gives, (3) name one device that commonly uses Harvard architecture and explain why. Include a source.
Classroom tips
The FDE Visualiser is the most effective tool in this lesson - run through it as a class first, then let students step through it independently. Register values updating in real time make abstract concepts concrete.
Students consistently conflate MDR and MAR. Use the analogy: MAR is the address on an envelope (where you're sending to), MDR is the letter inside (what you're sending). Both are needed; they do different jobs.
Timing: the manual trace activity is the most time-consuming and most valuable. Do not cut it. Students who skip the trace rarely understand the PC increment correctly.
For higher-attaining students: introduce the Von Neumann bottleneck here. This motivates cache (Lesson 3) without spoiling that lesson.
Resources
FDE Cycle Visualiser Worksheet 1 - Key terms and FDE cycle table Worksheet 2 - Application and justification Worksheet 3 - Exam-style practice paper Computer Systems series overview Set as class homework (coming soon)