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Logic gates are the physical switches everything else in a computer is built from. This page focuses on two things worth genuinely understanding: how simple gates combine into a circuit that actually adds binary numbers, and how to simplify a Boolean expression with proof at every step, not just a final answer to trust.
Pick a gate and toggle its inputs. Watch which row of the truth table lights up to match.
This is why NAND is called a universal gate. You don't strictly need separate NOT, AND and OR gates at all, wiring NAND gates together in the right pattern reproduces every one of them exactly. This is a genuine reason real chips are built almost entirely from one repeated gate design.
| Gate | Built from NAND as |
|---|---|
| NOT(A) | NAND(A, A) |
| AND(A,B) | NAND(NAND(A,B), NAND(A,B)) |
| OR(A,B) | NAND(NAND(A,A), NAND(B,B)) |
NOT is just NAND fed the same input twice. AND is NAND's output inverted (using the NOT-from-NAND trick on itself). OR is built by inverting both inputs first, then NANDing those, which is exactly De Morgan's law in physical form.
Remember doing binary column addition by hand, writing the bit and carrying the 1? This is the actual circuit that does exactly that, built from nothing but two gates.
Built from exactly two half adders (the circuit above, used twice) plus one OR gate to combine their two carry outputs.
Four full adders, wired so each one's carry-out feeds the next one's carry-in, exactly like the overflow work you've already covered, except this time it's genuinely happening in the circuit, not just described in words. Set two 4-bit numbers and watch the carry ripple through, right to left.
A (bits 8,4,2,1)
B (bits 8,4,2,1)
Not just a table to memorise, toggle A, B and C and watch every law hold true for every combination you try. That's what makes these laws, laws, rather than a coincidence for one specific input.
Every step below is checked against a live truth table. If simplifying ever changed the actual logic, you'd see the table stop matching, it doesn't, at any step.
It's tempting to think NOT(A AND B) is just NOT(A) AND NOT(B). It isn't. Toggle the inputs and watch both sides of each law stay identical, while the "wrong" version breaks.
Section 7 simplified expressions with algebra, law by law. A Karnaugh map does the identical job by arranging every input combination on a grid where physically neighbouring cells differ by exactly one variable, so a valid group of 1s can always be described by dropping whichever variable changes across it. Click cells to build your own truth table, or load an example.
Groups must be rectangles of 1s sized a power of 2 (1, 2, 4, 8...). Groups can wrap around the grid's edges, the left and right edges are actually adjacent, and so are the top and bottom. Whichever variable stays constant across every cell in a group survives in that term, any variable that changes gets eliminated. A cell with a single coloured border belongs to one group. A cell showing small coloured dots in its corners instead belongs to more than one group at once, one dot per group, matching the colours of the group chips below.
Every gate you've built so far responds instantly and continuously, change an input, the output updates immediately. A D-type flip-flop is different on purpose: it only ever looks at its D input at one precise moment, the instant the clock signal rises from 0 to 1, and then holds that value steady no matter what D does afterwards. This is the actual building block PC, MAR, MDR and ACC are made from.
A CPU register like ACC isn't one special component, it's just several D-type flip-flops, one per bit, all sharing the same clock line. Load a 4-bit value and watch it only update on the shared clock pulse, exactly like ACC only changing at a specific point in the fetch-execute cycle.