CodeBash  |  Computer Systems  |  Class Test 1
CPU Architecture & the FDE Cycle
Lessons 1 and 2 - Recall and Apply
Total
marks
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Name:
Class:
Date:
Instructions:
1  FDE Cycle[1 mark]
Name the three stages of the fetch-decode-execute cycle in the correct order.
2  FDE Cycle[3 marks]
Describe what happens during the fetch-decode-execute cycle. Give three distinct points.
3  Registers[4 marks]
Complete the table below. Write the name of the register or its purpose.
RegisterPurpose
Stores the address of the next instruction to be fetched from memory. Its value is incremented during each cycle.
Memory Data Register (MDR)
Stores the address of the memory location currently being read from or written to.
Accumulator (ACC)
4  CPU Components[4 marks]
Describe the purpose of the Control Unit (CU) and the Arithmetic Logic Unit (ALU) within the CPU. Give two points for each.
(a) Control Unit (CU)[2 marks]
(b) Arithmetic Logic Unit (ALU)[2 marks]
5  Von Neumann / Stored Program[5 marks]
Tick (✓) one box in each row to show whether each statement is True or False.
StatementTrueFalse
The ALU performs arithmetic calculations and logical comparisons.
The Program Counter stores the instruction currently being executed.
In Von Neumann architecture, programs and data share the same memory space.
The Memory Data Register stores the address of a memory location.
The Current Instruction Register holds the instruction currently being decoded.
6  Stored Program Concept[2 marks]
Explain what is meant by the stored program concept.
7  Registers[3 marks]
A student claims: "The Program Counter stores a copy of the instruction currently being run by the CPU."

State whether this claim is correct or incorrect, and justify your answer.
8  CPU & RAM[2 marks]
Describe how the CPU and RAM work together when a program is running.